2 Commits

Include renames

Author	SHA1	Message	Date
Omar SobhandClaude Sonnet 4.6	33135194d4	docs: GPU perf batch 1 design spec (FA3, FP8, CUDA Graphs, SnapKV) ... Research-driven design for 4 high-impact optimizations targeting Blackwell SM_120 (RTX 5060 Ti): - Item 1: CUDA Graphs wiring (90% exists, half-day task) - Item 2: FP8 E4M3/E5M2 training (30-40% throughput, 50% memory) - Item 3: FlashAttention-3 WGMMA+TMA+warp specialization (1.5-2x) - Item 4: SnapKV + prefix caching (50-70% KV reduction) Based on: arXiv:2407.08608 (FA3), arXiv:2511.05811 (MOSS FP8), arXiv:2404.14469 (SnapKV), PyTorch 2025 state survey. Co-Authored-By: Claude Sonnet 4.6 <[email protected]>	2026-06-26 19:40:26 +00:00
Omar SobhandClaude Sonnet 4.6	57e5252caa	docs: add full repository review spec (2026-06-26) ... Comprehensive layered architectural review covering all 109 crates, 306K LOC, 13,351 tests. Identifies 9 gaps (G0-G8) with the highest- priority being 45 unimplemented! panics across rtx-backend-cuda/rocm/sycl and the rtx-distributed workspace exclusion. Includes 17-item 4-phase roadmap through 90 days. Co-Authored-By: Claude Sonnet 4.6 <[email protected]>	2026-06-26 12:48:03 +00:00