rtx-cfd/rtx-fsi PERF-2 P3-iii: the MarchPlane — lane-table V-cycle kernels (ml_*), the batched apply over K lanes' own operators, the plane rendezvous inside the CG's preconditioner (lane thread-local, CG guard), set_plane_lane/plane_counters; the fsi2_overset_plane driver (K lane threads, one process); G-P0 unit tests: K distinct operators batched = solo apply bit for bit, uneven lanes served exactly
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Co-Authored-By: Claude Fable 5.1 <[email protected]>
This commit is contained in:
Omar Sobh
2026-09-16 17:03:51 -05:00
co-authored by Claude Fable 5.1
parent 49ccebc863
commit 95ffde9591
7 changed files with 946 additions and 13 deletions
@@ -174,9 +174,21 @@ fn batched_device_vcycle_go_no_go() {
cells: up_u(&l.cells),
red: up_u(&l.red),
black: up_u(&l.black),
coarse_of: up_u(if l.coarse_of.is_empty() { &[0u32][..] } else { &l.coarse_of }),
children_ptr: up_u(if l.children_ptr.is_empty() { &[0u32][..] } else { &l.children_ptr }),
children_idx: up_u(if l.children_idx.is_empty() { &[0u32][..] } else { &l.children_idx }),
coarse_of: up_u(if l.coarse_of.is_empty() {
&[0u32][..]
} else {
&l.coarse_of
}),
children_ptr: up_u(if l.children_ptr.is_empty() {
&[0u32][..]
} else {
&l.children_ptr
}),
children_idx: up_u(if l.children_idx.is_empty() {
&[0u32][..]
} else {
&l.children_idx
}),
n_cells: l.cells.len(),
n_red: l.red.len(),
n_black: l.black.len(),
@@ -206,7 +218,11 @@ fn batched_device_vcycle_go_no_go() {
// Upload the residual into level 0's b.
stream.memcpy_htod(r_f32, &mut dev[0].b).unwrap();
let half = |lv: &mut DeviceLevel, colour: u8| {
let (list, n_list) = if colour == 0 { (&lv.red, lv.n_red) } else { (&lv.black, lv.n_black) };
let (list, n_list) = if colour == 0 {
(&lv.red, lv.n_red)
} else {
(&lv.black, lv.n_black)
};
let n_i = lv.n as i32;
let n_list_i = n_list as i32;
unsafe {
@@ -371,7 +387,10 @@ fn batched_device_vcycle_go_no_go() {
let (db, sb) = cmp(&b[..n], b_ref);
let (dx, sx) = cmp(&x[..n], x_ref);
let (dr, sr) = cmp(&r[..n], r_ref);
println!(" level {l} ({} cells): |Δb| {db:.3e} / {sb:.3e}, |Δx| {dx:.3e} / {sx:.3e}, |Δr| {dr:.3e} / {sr:.3e}", levels[l].cells.len());
println!(
" level {l} ({} cells): |Δb| {db:.3e} / {sb:.3e}, |Δx| {dx:.3e} / {sx:.3e}, |Δr| {dr:.3e} / {sr:.3e}",
levels[l].cells.len()
);
}
}
let mut worst = 0.0_f64;
@@ -381,8 +400,13 @@ fn batched_device_vcycle_go_no_go() {
worst = worst.max(d);
}
}
println!(" K = {k}: device V-cycle vs CPU f32 reference: max |Δz| {worst:.3e} on a scale of {z_scale:.3e}");
assert!(worst < 1e-4 * z_scale, "device V-cycle disagrees with the CPU one");
println!(
" K = {k}: device V-cycle vs CPU f32 reference: max |Δz| {worst:.3e} on a scale of {z_scale:.3e}"
);
assert!(
worst < 1e-4 * z_scale,
"device V-cycle disagrees with the CPU one"
);
// Timing: 50 V-cycles, per march.
let reps = 50;