4 Commits

Include renames

Author	SHA1	Message	Date
osobhandClaude Opus 5	56a8c2f3d0	feat(accel): aarch64 int8 dot product — SDOT and plain NEON ... `dot_i8` had an AVX2 kernel and a scalar fallback, so on aarch64 the quantised HNSW index ran the scalar loop. It now dispatches to one of two NEON kernels: - `dot_i8_dotprod`: the ARMv8.2 dot-product instruction, `SDOT`, which multiplies and accumulates sixteen i8 pairs into four i32 lanes per instruction. Present on Cortex-A76 and later (Raspberry Pi 5, current Android phones), Neoverse-N1 (Graviton2, Ampere Altra) and every Apple Silicon generation. Issued as inline assembly because the `vdotq_s32` intrinsic is still behind the unstable `stdarch_neon_dotprod` feature; inline asm is stable on aarch64. - `dot_i8`: plain NEON for cores without the extension — `vmull_s8` widens to i16 (even -128 * -128 fits) and `vpadalq_s16` folds adjacent pairs into i32 accumulators, so nothing overflows. Selected at runtime with `is_aarch64_feature_detected!("dotprod")`. Verified on a Raspberry Pi 5 (Cortex-A76, `asimddp` present), not just compiled — the aarch64 code is cfg'd out on x86, so x86 CI never builds or lints it: - both kernels bit-exact against scalar at every length, tails and extremes included. Each is tested directly rather than through dispatch, because dispatch only takes one path on a given CPU: on the Pi, testing through it alone would never have run the plain-NEON fallback at all. - mutation-checked: dropping the SDOT kernel's second accumulator fails at length 32, and using the low half twice in the NEON kernel fails at length 16 — the first lengths that exercise each. - the ANN suite passes, including int8 recall against ground truth. - clippy clean with -D warnings on aarch64. Co-Authored-By: Claude Opus 5 (1M context) <[email protected]>	2026-09-21 17:34:51 -07:00
osobhandClaude Fable 5.1	a3f7c6fe89	style: cargo fmt --all ... Formatting only. cargo fmt --check was already failing on main (accel SIMD kernels, agent, format, migrate, bench); CI now enforces it. Co-Authored-By: Claude Fable 5.1 <[email protected]>	2026-09-19 05:36:23 -07:00
clawhdf5 committer agentandClaude Sonnet 5	377c8b6f17	fix(accel): restore f32::EPSILON near-zero-denom guard in cosine_similarity ... The SIMD migration weakened the near-zero-norm guard in all four clawhdf5-accel cosine_similarity backends (scalar/avx2/avx512/neon) from `denom < f32::EPSILON` to `denom == 0.0`. Vectors with a tiny but nonzero norm (denom in (0, 1.19e-7)) fell through to dot/denom and scored as identical instead of maximally dissimilar, diverging from the pre-SIMD scalar loop's documented fallback behavior. Restores the epsilon threshold in all four backends so `1.0 - cosine_similarity(...)` in hnsw.rs::compute_distance reproduces the old fallback exactly. Adds regression tests in clawhdf5-accel and clawhdf5-ann locking in the near-zero-norm case. Co-Authored-By: Claude Sonnet 5 <[email protected]>	2026-08-17 13:28:43 +00:00
redclawsystems	3f222f6956	Merge pull request 'docs(clawhdf5): document DType variants, fix unresolved doc links' (#17) from sdlc-docs/clawhdf5-types-20260514-165210 into main	2026-05-14 23:54:48 +00:00